Rule-based and algorithmic approach for logic synthesis

Takeshi Yoshimura

研究成果: Article査読

抄録

This paper presents a logic synthesis system based on a combined rule-based and algorithmic approach, where not only tables for transformation are described as rules, but also a two-level logic minimization algorithm is registered as one of the rules. A rule interpreter fires these rules using an effective branch and bound technique. Physical constraints such as longest path lengths between registers, fan-in/out and polarity are checked whenever each rule is applied. The system was implemented in the C language on an EWS4800 and a SUN2/160 workstations and has been applied for actual circuits used in production. The results show that the system generates solutions very close to manual implementation. They also show that the system with the logic minimization algorithm produces 20% smaller circuits on the average than in the case where the algorithm was skipped.

本文言語English
ページ(範囲)98-103
ページ数6
ジャーナルNEC Research and Development
91
出版ステータスPublished - 1988 10
外部発表はい

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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