抄録
The need for chemical contamination control for future LSI's is investigated by considering device failure mechanisms. The allowable contamination density is calculated by deducing relationships between the contamination density and resultant defect density from experimental results. In the calculations LSI failures are classified into two groups according to the characteristics of failure-producing defects: macrotype and microtype. The former defects are macroscopic and fatal: a single defect causes a failure. A stricter contamination control is required for smaller devices similar to that predicted by conventional yield theory. This is due to increasing chip area. By contrast the latter defects are of atomic size, and a single defect is not fatal: devices fail when the defect density exceeds some threshold value. Transconductance degradation in MOS transistors due to interface traps and the resultant SRAM operation error is proposed as an example. The threshold defect (or contamination) density for the failure could be 1 × 1011 cm-2 in this model. The allowable contamination density abruptly decreases for a minimum pattern size smaller than 0.1 μm. This is due to increasing fluctuations of defect density in component devices. This failure might cause a bottleneck in developing gigabit memories.
本文言語 | English |
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ページ(範囲) | 60-67 |
ページ数 | 8 |
ジャーナル | IEEE Transactions on Semiconductor Manufacturing |
巻 | 7 |
号 | 1 |
DOI | |
出版ステータス | Published - 1994 2月 |
外部発表 | はい |
ASJC Scopus subject areas
- 電子工学および電気工学
- 産業および生産工学
- 電子材料、光学材料、および磁性材料
- 物理学および天文学(その他)
- 凝縮系物理学