Scaling scenario of floating body cell (FBC) suppressing Vth variation due to random dopant fluctuation

Hironobu Furuhashi, Tomoaki Shino, Takashi Ohsawa, Fumiyoshi Matsuoka, Tomoki Higashi, Yoshihiro Minami, Hiroomi Nakajima, Katsuyuki Fujita, Ryo Fukuda, Takeshi Hamamoto, Akihiro Nitayama

研究成果: Conference contribution

14 被引用数 (Scopus)

抄録

A scaling scenario of fully-depleted floating body cell (FBC) is demonstrated in view of signal margin for stable array functionality. Measurement and numerical simulation reveal that the Vth variation of cell array transistors is mainly attributed to the random dopant fluctuation in channel region. By setting the channel impurity concentration in the order of 1016cm-3 or lower, Gbit array functionality is guaranteed for the 32nm node and further scaled generations.

本文言語English
ホスト出版物のタイトル2008 IEEE International SOI Conference Proceedings
ページ33-34
ページ数2
DOI
出版ステータスPublished - 2008 12 24
外部発表はい
イベント2008 IEEE International SOI Conference - New Paltz, NY, United States
継続期間: 2008 10 62008 10 9

出版物シリーズ

名前Proceedings - IEEE International SOI Conference
ISSN(印刷版)1078-621X

Other

Other2008 IEEE International SOI Conference
国/地域United States
CityNew Paltz, NY
Period08/10/608/10/9

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

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