Self-limiting laser thermal process for ultra-shallow junction formation of 50-nm gate CMOS

Akio Shima; Hiroshi Ashihara; Toshiyuki Mine; Yasushi Goto; Masatada Horiuchi; Yun Wang; Somit Talwar; Atsushi Hiraiwa

Self-limiting laser thermal process for ultra-shallow junction formation of 50-nm gate CMOS

Akio Shima, Hiroshi Ashihara, Toshiyuki Mine, Yasushi Goto, Masatada Horiuchi, Yun Wang, Somit Talwar, Atsushi Hiraiwa

研究成果: Conference contribution

抄録

We have developed a novel LTP that dramatically enhances laser exposure window by controlling the heating process in a self-limiting way (SL-LTP). The Vth roll-offs of MOSFETs formed by this method were remarkably improved compared to those by RTA when offset-spacer and halo-implantation processes were not applied. Its effectiveness was also verified in 50-nm gate CMOS devices for the first time by confirming that the drain current increased with laser fluence beyond the conventional exposure limit.

本文言語	English
ホスト出版物のタイトル	Technical Digest - International Electron Devices Meeting
ページ	493-496
ページ数	4
出版ステータス	Published - 2003
外部発表	はい
イベント	IEEE International Electron Devices Meeting - Washington, DC, United States 継続期間: 2003 12 8 → 2003 12 10

Other

Other	IEEE International Electron Devices Meeting
Country	United States
City	Washington, DC
Period	03/12/8 → 03/12/10

ASJC Scopus subject areas

Electrical and Electronic Engineering

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引用スタイル

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abstract = "We have developed a novel LTP that dramatically enhances laser exposure window by controlling the heating process in a self-limiting way (SL-LTP). The Vth roll-offs of MOSFETs formed by this method were remarkably improved compared to those by RTA when offset-spacer and halo-implantation processes were not applied. Its effectiveness was also verified in 50-nm gate CMOS devices for the first time by confirming that the drain current increased with laser fluence beyond the conventional exposure limit.",

author = "Akio Shima and Hiroshi Ashihara and Toshiyuki Mine and Yasushi Goto and Masatada Horiuchi and Yun Wang and Somit Talwar and Atsushi Hiraiwa",

year = "2003",

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T1 - Self-limiting laser thermal process for ultra-shallow junction formation of 50-nm gate CMOS

AU - Shima, Akio

AU - Ashihara, Hiroshi

AU - Mine, Toshiyuki

AU - Goto, Yasushi

AU - Horiuchi, Masatada

AU - Wang, Yun

AU - Talwar, Somit

AU - Hiraiwa, Atsushi

PY - 2003

Y1 - 2003

N2 - We have developed a novel LTP that dramatically enhances laser exposure window by controlling the heating process in a self-limiting way (SL-LTP). The Vth roll-offs of MOSFETs formed by this method were remarkably improved compared to those by RTA when offset-spacer and halo-implantation processes were not applied. Its effectiveness was also verified in 50-nm gate CMOS devices for the first time by confirming that the drain current increased with laser fluence beyond the conventional exposure limit.

AB - We have developed a novel LTP that dramatically enhances laser exposure window by controlling the heating process in a self-limiting way (SL-LTP). The Vth roll-offs of MOSFETs formed by this method were remarkably improved compared to those by RTA when offset-spacer and halo-implantation processes were not applied. Its effectiveness was also verified in 50-nm gate CMOS devices for the first time by confirming that the drain current increased with laser fluence beyond the conventional exposure limit.

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AN - SCOPUS:0842266590

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EP - 496

BT - Technical Digest - International Electron Devices Meeting

T2 - IEEE International Electron Devices Meeting

Y2 - 8 December 2003 through 10 December 2003

ER -