Simultaneous placement and global routing for transport-processing FPGA layout

Mathematics

• Congestion 40%
• Decrease 6%
• Demonstrate 4%
• Experimental Results 7%
• Field Programmable Gate Array 100%
• Granularity 10%
• Layout 73%
• Logic 6%
• Look-up Table 34%
• Maximum Flow 10%
• Minimum Cut 10%
• Necessary 5%
• Network Flow 10%
• Placement 73%
• Resources 7%
• Routing 69%
• Routing Algorithm 11%
• Telecommunications 10%
• Tend 5%

Engineering & Materials Science

• Field programmable gate arrays (FPGA) 51%
• Networks (circuits) 26%
• Routing algorithms 16%
• Table lookup 57%
• Telecommunication systems 19%