抄録
The authors present a single-chip VLSI chrominance/luminance (Y/C) separator that is economically fabricated for NTSC TV signals at 13.5-MHz CCIR standard sampling rate. In order to realize compactness and low power dissipation, two FIR filter architectures and a multiplier structure are proposed. A silicon compiler, which uses these structures, also contributes to fast and error-free VLSI development. The Y/C separator chip has 10.4-mm × 11.7-mm die size and attains about 860-MOPS operating speed.
| 本文言語 | English |
|---|---|
| ホスト出版物のタイトル | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings |
| 編集者 | Anon |
| 出版社 | Publ by IEEE |
| ページ | 2433-2436 |
| ページ数 | 4 |
| 巻 | 4 |
| 出版ステータス | Published - 1989 |
| 外部発表 | はい |
| イベント | 1989 International Conference on Acoustics, Speech, and Signal Processing - Glasgow, Scotland 継続期間: 1989 5月 23 → 1989 5月 26 |
Other
| Other | 1989 International Conference on Acoustics, Speech, and Signal Processing |
|---|---|
| City | Glasgow, Scotland |
| Period | 89/5/23 → 89/5/26 |
ASJC Scopus subject areas
- 信号処理
- 電子工学および電気工学
- 音響学および超音波学