Soft-error resilient 3D Network-on-Chip router

Khanh N. Dang, Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, Xuan Tu Tran

研究成果

9 被引用数 (Scopus)

抄録

Three-Dimensional Networks-on-Chips (3D-NoCs) have been proposed as an auspicious solution, merging the high parallelism of the Network-on-Chip (NoC) paradigm with the high-performance and low-power of 3D-ICs. However, as feature sizes and power supply voltages continually decrease, the devices and interconnects have become more vulnerable to transient errors. Transient errors, or soft errors, have severe consequences on chip performance, such as deadlock, data corruption, packet loss and increased packet latency. In this paper, we propose a soft-error resilient 3D-NoC router (SER-3DR) architecture for highly-reliable many-core Systems-on-Chips. The proposed architecture is able to recover from transient errors occurring in different pipeline stages of the SER-3DR.We implemented the architecture in hardware with 45 nm CMOS technology. Evaluation results show that SER-3DR is able to achieve a high level of transient error protection with a latency increase of 18.16%, an additional area cost of 14.98% and a power overhead of 5.90% when compared to the baseline router architecture.

本文言語English
ホスト出版物のタイトルIEEE 7th International Conference on Awareness Science and Technology, iCAST 2015 - Proceedings
出版社Institute of Electrical and Electronics Engineers Inc.
ページ84-90
ページ数7
ISBN(電子版)9781467376587
DOI
出版ステータスPublished - 2015 10 30
外部発表はい
イベント7th IEEE International Conference on Awareness Science and Technology, iCAST 2015 - Qinhuangdao, China
継続期間: 2015 9 222015 9 24

出版物シリーズ

名前IEEE 7th International Conference on Awareness Science and Technology, iCAST 2015 - Proceedings

Other

Other7th IEEE International Conference on Awareness Science and Technology, iCAST 2015
国/地域China
CityQinhuangdao
Period15/9/2215/9/24

ASJC Scopus subject areas

  • 信号処理
  • コンピュータ ネットワークおよび通信
  • コンピュータ ビジョンおよびパターン認識

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