State dependent scan flip-flop with key-based configuration against scan-based side channel attack on RSA circuit

研究成果: Conference contribution

9 被引用数 (Scopus)

抄録

Scan test is one of the useful design for testability techniques, which can detect circuit failure efficiently. However, it has been reported that it's possible to retrieve secret keys from cryptographic LSIs through scan chains. Therefore testability and security contradicted to each other, and there is a need to an efficient design for testability circuit so as to satisfy both testability and security requirement. In this paper, a secure scan architecture against scan-based attack is proposed to achieve high security without compromising the testability. In our method, scan structure is dynamically changed by adding the latch to any FFs in the scan chain. We made an analysis on an RSA circuit implementation to show the effectiveness of the proposed method and discussed how our approach is resistant to scan-based attack.

本文言語English
ホスト出版物のタイトル2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012
ページ607-610
ページ数4
DOI
出版ステータスPublished - 2012 12 1
イベント2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 - Kaohsiung, Taiwan, Province of China
継続期間: 2012 12 22012 12 5

出版物シリーズ

名前IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Conference

Conference2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012
国/地域Taiwan, Province of China
CityKaohsiung
Period12/12/212/12/5

ASJC Scopus subject areas

  • 電子工学および電気工学

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