Study of self-aligned doped channel MOSFET structure for low power and low 1/f noise operation

Takashi Yoshitomi, Hideki Kimijima, Shinnichiro Ishizuka, Yasunori Miyahara, Tatsuya Ohguro, Eiji Morifuji, Toyota Morimoto, Hisayo Sasaki Momose, Yasuhiro Katsumata, Hiroshi Iwai

研究成果: Article査読

5 被引用数 (Scopus)

抄録

A self-Aligned Doped Channel (SADC) is proposed and investigated for the first time. In the SADC process, the channel doping process is carried out by using solid phase diffusion from the gate; hence the doping region is fully self-aligned to the gate, and the junction capacitance can be reduced. In addition, the implantation damage in the channel is reduced. We obtained 0.25 μm gate length nMOSFETs with low noise and low power consumption by using the SADC structure. Hence, this structure is attractive for small geometry RF CMOS devices.

本文言語English
ページ(範囲)1219-1224
ページ数6
ジャーナルSolid-State Electronics
43
7
DOI
出版ステータスPublished - 1999 7
外部発表はい

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 凝縮系物理学
  • 電子工学および電気工学
  • 材料化学

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