System architecture of parallel processing system - Harray

Hayato Yamana, Toshikazu Marushima, Takashi Hagiwara, Yoichi Muraoka

研究成果: Conference contribution

3 被引用数 (Scopus)

抄録

This paper proposes a parallel processing system - Harray-for scientific computations. Data flow computers are expected to obtain the high performance because they can extract parallelism fully from a program. However, they have many problems, such as the difficulty of controlling the sequence of execution. The - Harray - system is an array processor which adapts two levels of control mechanism; data flow execution in each processor and control flow between processors, in order to take full advantage of both mechanisms. A task which is assigned to a processor is called a "macro-block". Three types of macro-blocking and three types of activation schemes for the macro-block which initiates its execution are introduced in order to attain the high performance. Moreover, a hardware synchronization mechanism is used to reduce synchronization overhead and to gain the liner speedup of the - Harray - system. In this paper, the system architecture of the - Harray - system and its performance evaluation by software simulation are presented.

本文言語English
ホスト出版物のタイトルProceedings of the 2nd International Conference on Supercomputing, ICS 1988
編集者J. Lenfant
出版社Association for Computing Machinery
ページ76-89
ページ数14
ISBN(電子版)0897912721
DOI
出版ステータスPublished - 1988 6 1
イベント2nd International Conference on Supercomputing, ICS 1988 - St. Malo, France
継続期間: 1988 7 41988 7 8

出版物シリーズ

名前Proceedings of the International Conference on Supercomputing
Part F130184

Other

Other2nd International Conference on Supercomputing, ICS 1988
CountryFrance
CitySt. Malo
Period88/7/488/7/8

ASJC Scopus subject areas

  • Computer Science(all)

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