Through-silicon-via assignment for 3D ICs

Jianchang Ao, Sheqin Dong, Song Chen, Satoshi Goto

研究成果: Conference contribution

抄録

Three-dimensional integrated circuits (3D ICs) can alleviate the interconnect problem coming with the decreasing feature size and increasing integration density, and promise a solution to heterogeneous integration. The inter-layer connection, which is generally implemented by the Through-Silicon-Via (TSV), is a key technology for 3D ICs. In this paper, we propose a unified simulated annealing technology to tackle the TSV assignment problem, including the signal TSV assignment of 3D nets and 3D buses. The experiment results show the effective of the method.

本文言語English
ホスト出版物のタイトルProceedings of International Conference on ASIC
ページ353-356
ページ数4
DOI
出版ステータスPublished - 2011
イベント2011 IEEE 9th International Conference on ASIC, ASICON 2011 - Xiamen
継続期間: 2011 10 252011 10 28

Other

Other2011 IEEE 9th International Conference on ASIC, ASICON 2011
CityXiamen
Period11/10/2511/10/28

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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