Timing-aware ATPG for high quality at-speed testing of small delay defects

Xijiang Lin*, Kun Han Tsai, Chen Wang, Mark Kassab, Janusz Rajski, Takeo Kobayashi, Randy Klingenberg, Yasuo Sato, Shuji Hamada, Takashi Aikyo

*この研究の対応する著者

研究成果: Conference contribution

125 被引用数 (Scopus)

抄録

In this paper, a new ATPG methodology is proposed to improve the quality of test sets generated for detecting delay defects. This is achieved by integrating timing information, e.g. from Standard Delay Format (SDF) flies, into the ATPG tool. The timing information is used to guide the test generator to detect faults through the longest paths in order to improve the ability to detect small delay detects. To avoid propagating faults through similar paths repeatedly, a weighted random method is proposed to improve the path coverage during test generation. During fault simulation, a new fault-dropping criterion, named Dropping based on Slack Margin (DSM), is proposed to facilitate the trade-off between the test set quality and the test pattern count. The quality of the generated test set is measured by two metrics: delay test coverage and SDQL. The experimental results show that significant test quality improvement is achieved when applying timing-aware ATPG with DSM to industrial designs.

本文言語English
ホスト出版物のタイトルProceedings of the 15th Asian Test Symposium 2006
ページ139-146
ページ数8
DOI
出版ステータスPublished - 2006
外部発表はい
イベント15th Asian Test Symposium 2006 - Fukuoka, Japan
継続期間: 2006 11月 202006 11月 23

出版物シリーズ

名前Proceedings of the Asian Test Symposium
2006
ISSN(印刷版)1081-7735

Conference

Conference15th Asian Test Symposium 2006
国/地域Japan
CityFukuoka
Period06/11/2006/11/23

ASJC Scopus subject areas

  • 電子工学および電気工学

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