Timing monitoring paths selection for wide voltage IC

Weiwei Shan, Wentao Dai, Youhua Shi, Peng Cao, Xiaoyan Xiang

研究成果: Article査読

6 被引用数 (Scopus)

抄録

Wide voltage range circuit has got widespread attention where in-situ timing monitoring based adaptive voltage scaling (AVS) becomes necessary to reduce the design margin. However, the severe PVT variations across near-threshold to super-threshold cause too many critical paths to be monitored. Here activation oriented monitoring paths selection method is proposed to reduce the monitored paths for wide voltage IC. The minimum delay value of the longest activated path is found by dynamic timing analysis and set as the selection threshold. Those paths longer than this threshold by STA analysis are selected to be monitored. Applied on a 40 nm AVS Systemon-Chip, it reduces the monitoring paths to only 22% of all critical paths with remarkable power gains under 0.6 V–1.1 V.

本文言語English
論文番号20160095
ジャーナルieice electronics express
13
8
DOI
出版ステータスPublished - 2016 3 29

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 凝縮系物理学
  • 電子工学および電気工学

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