Topology optimization of conductors in electrical circuit

Katsuya Nomura*, Shintaro Yamasaki, Kentaro Yaji, Hiroki Bo, Atsuhiro Takahashi, Takashi Kojima, Kikuo Fujita

*この研究の対応する著者

研究成果: Article査読

7 被引用数 (Scopus)

抄録

This study proposes a topology optimization method for realizing a free-form design of conductors in electrical circuits. Conductors in a circuit must connect components, such as voltage sources, resistors, capacitors, and inductors, according to the given circuit diagram. The shape of conductors has a strong effect on the high-frequency performance of a circuit due to parasitic circuit elements such as parasitic inductance and capacitance. In this study, we apply topology optimization to the design of such conductors to minimize parasitic effects with maximum flexibility of shape manipulation. However, when the distribution of conductors is repeatedly updated in topology optimization, disconnections and connections of conductors that cause open and short circuits, respectively, may occur. To prevent this, a method that uses fictitious electric current and electric field calculations is proposed. Disallowed disconnections are prevented by limiting the maximum value of the fictitious current density in conductors where a current is induced. This concept is based on the fact that an electric current becomes concentrated in a thin conductor before disconnection occurs. Disallowed connections are prevented by limiting the maximum value of the fictitious electric field strength around conductors where a voltage is applied. This is based on the fact that the electric field in a parallel plate capacitor is inversely proportional to the distance between the plates. These limitations are aggregated as a single constraint using the Kreisselmeier-Steinhauser function in the formulation of optimization problems. This constraint prevents only disallowed disconnections and connections, but does not prevent allowed topology changes. The effectiveness of the constraint is confirmed using simple examples, and an actual design problem involving conductors in electromagnetic interference filters is used to verify that the proposed constraint can be utilized for conductor optimization.

本文言語English
ページ(範囲)2205-2225
ページ数21
ジャーナルStructural and Multidisciplinary Optimization
59
6
DOI
出版ステータスPublished - 2019 6月 15
外部発表はい

ASJC Scopus subject areas

  • ソフトウェア
  • 制御およびシステム工学
  • コンピュータ サイエンスの応用
  • コンピュータ グラフィックスおよびコンピュータ支援設計
  • 制御と最適化

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