We activated source/drain junctions of CMOS by simply replacing RTA in the conventional production flow by non-melt laser spike annealing (LSA). We did not form any additional layers unlike the conventional laser annealing. The 50-nm gate CMOS devices thus formed had overwhelmingly better Vth roll-offs and larger drain currents compared to those by RTA. We found that the LSA-devices without offset spacers had better performance than those with offset spacers, and that the optimization of the overlap length between the gate and source/drain extensions was important due to the minimal lateral diffusion during the sub-millisecond annealing of LSA.
|ホスト出版物のタイトル||Digest of Technical Papers - Symposium on VLSI Technology|
|出版ステータス||Published - 2004|
|イベント||2004 Symposium on VLSI Technology - Digest of Technical Papers - Honolulu, HI, United States|
継続期間: 2004 6 15 → 2004 6 17
|Other||2004 Symposium on VLSI Technology - Digest of Technical Papers|
|Period||04/6/15 → 04/6/17|
ASJC Scopus subject areas