Variation-aware subthreshold logic circuit design

Hiroshi Fuketa, Ryo Takahashi, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

Subthreshold logic circuits are one of promising solutions to achieve ultra-low power operation. However, subthreshold circuits are significantly sensitive to manufacturing and environmental variability. In this paper, we will discuss design challenges in subthreshold logic circuits, such as rise in a minimum operating voltage, signal integrity degradation, and large delay variations.

本文言語English
ホスト出版物のタイトル2013 IEEE 10th International Conference on ASIC, ASICON 2013
出版社IEEE Computer Society
ISBN(印刷版)9781467364157
DOI
出版ステータスPublished - 2013 1 1
外部発表はい
イベント2013 IEEE 10th International Conference on ASIC, ASICON 2013 - Shenzhen, China
継続期間: 2013 10 282013 10 31

出版物シリーズ

名前Proceedings of International Conference on ASIC
ISSN(印刷版)2162-7541
ISSN(電子版)2162-755X

Other

Other2013 IEEE 10th International Conference on ASIC, ASICON 2013
CountryChina
CityShenzhen
Period13/10/2813/10/31

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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引用スタイル