VIDEO SIGNAL PROCESSING LSI AND ITS APPLICATION TO TV CODEC.

Shin ichi Maki, Kiichi Matsuda, Toshitaka Tsuda, Hirokazu Fukui, Hiroshisa Gambe

    研究成果: Article査読

    抄録

    The authors describe an LSI that was developed for wide application in digital video signal processing. The LSI consists of two independent 12-bit full adder/subtracters and a variable delay unit. The minimum arithmetic operation cycle time is 67 ns and the power dissipation is 250 mW. The LSI is packaged in a 135-pin RIT package. It has a rather simple structure, but has very powerful applications in real-time video signal processing. The application of this LSI to a TV conferencing codec is presented.

    本文言語English
    ページ(範囲)809-812
    ページ数4
    ジャーナルUnknown Journal
    出版ステータスPublished - 1986

    ASJC Scopus subject areas

    • Signal Processing
    • Electrical and Electronic Engineering
    • Acoustics and Ultrasonics

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